As the demands for speed and energy efficiency in generative AI continue to rise, the next-generation memory technology, DDR6, is gradually moving towards mass production and popularization. The industry expects that DDR6 will achieve large-scale commercialization in 2027.
At present, the world's three major DRAM manufacturers have all launched DDR6-related research and development work, fully laying out key technical links such as chip design, memory controllers, and packaging modules, and are committed to promoting product implementation. According to the planning progress of the international standards organization JEDEC, the draft of the main DDR6 specification was completed at the end of 2024, and the draft specification for the low-power version LPDDR6 is also planned to be released in the second quarter of 2025. It is expected to enter the platform-level testing and verification stage in 2026 to pave the way for official commercial use.
Samsung, SK Hynix, and Micron have completed the prototype testing phase and entered the verification cycle. They will cooperate with Intel, AMD, and NV, with a target base rate of 8800MT/s and a planned terrifying rate of 17600MT/s. For this goal, unlike the current DDR5 2x32 sub-channel architecture, DDR6 memory will adopt a 4x24 sub-channel architecture. And to overcome the physical limitations of DIMM, the physical form of DDR6 may be changed to CAMM2. The server platform will take the lead in this form change, followed by high-end mobile platforms.
In terms of the timetable, the verification of the DDR6 memory platform will be carried out in 2026, the server platform will take the lead in deployment in 2027, and then it will be widely used in consumer-level platforms. The higher bandwidth of DDR6 memory will further meet the needs of AI and high-performance computing.
